Zen 2 is a computer processor microarchitecture by AMD. It is the successor of AMD's Zen and Zen+ microarchitectures, and is fabricated on the 7 nm MOSFET node from TSMC. The microarchitecture powers the third generation of Ryzen processors, known as Ryzen 3000 for the mainstream desktop chips (codename "Matisse"), Ryzen 4000U/H (codename "Renoir") and Ryzen 5000U (codename "Lucienne") for mobile applications, as Threadripper 3000 for high-end desktop systems,[5][6] and as Ryzen 4000G for accelerated processing units (APUs). The Ryzen 3000 series CPUs were released on 7 July 2019,[7][8] while the Zen 2-based Epyc server CPUs (codename "Rome") were released on 7 August 2019.[9] An additional chip, the Ryzen 9 3950X, was released in November 2019.[7]

AMD Zen 2
General information
Launched7 July 2019; 4 years ago (7 July 2019)[1]
Designed byAMD
Common manufacturer(s)
Cache
L1 cache64 KB (per core)
L2 cache512 KB (per core)
Architecture and classification
Technology nodeTSMC N7[2][3]
TSMC N6[4]
Instruction setAMD64 (x86_64)
Physical specifications
Cores
  • Up to 64
Socket(s)
Products, models, variants
Product code name(s)
  • Matisse (desktop)
  • Rome (server)[3]
  • Castle Peak (HEDT)
  • Renoir (Desktop APU, mobile and embedded)
  • Mendocino (mobile and embedded refresh)
History
Predecessor(s)Zen+
Successor(s)Zen 3
Support status
Supported

At CES 2019, AMD showed a Ryzen third-generation engineering sample that contained one chiplet with eight cores and 16 threads.[5] AMD CEO Lisa Su also said to expect more than eight cores in the final lineup.[10] At Computex 2019, AMD revealed that the Zen 2 "Matisse" processors would feature up to 12 cores, and a few weeks later a 16 core processor was also revealed at E3 2019, being the aforementioned Ryzen 9 3950X.[11][12]

Zen 2 includes hardware mitigations to the Spectre security vulnerability.[13] Zen 2-based EPYC server CPUs use a design in which multiple CPU dies (up to eight in total) manufactured on a 7 nm process ("chiplets") are combined with a 14nm I/O die (as opposed to the 12nm IOD on Matisse variants) on each multi-chip module (MCM) package. Using this, up to 64 physical cores and 128 total compute threads (with simultaneous multithreading) are supported per socket. This architecture is nearly identical to the layout of the "pro-consumer" flagship processor Threadripper 3990X.[14] Zen 2 delivers about 15% more instructions per clock than Zen and Zen+,[15][16] the 14- and 12-nm microarchitectures utilized on first and second generation Ryzen, respectively.

The Steam Deck,[17][18] PlayStation 5, Xbox Series X and Series S all use chips based on the Zen 2 microarchitecture, with proprietary tweaks and different configurations in each system's implementation than AMD sells in its own commercially available APUs.[19][20]

Design

Two delidded Zen 2 processors designed with the multi-chip module approach. The CPU on the left/top (used for mainstream Ryzen CPUs) uses a smaller, less capable I/O die and up to two CCDs (only one is used on this particular example), while the one on the right/bottom (used for high-end desktop, HEDT, Ryzen Threadripper and server Epyc CPUs) uses a larger, more capable I/O die and up to eight CCDs.

Zen 2 is a significant departure from the physical design paradigm of AMD's previous Zen architectures, Zen and Zen+. Zen 2 moves to a multi-chip module design where the I/O components of the CPU are laid out on its own, separate die, which is also called a chiplet in this context. This separation has benefits in scalability and manufacturability. As physical interfaces don't scale very well with shrinks in process technology, their separation into a different die allows these components to be manufactured using a larger, more mature process node than the CPU dies. The CPU dies (referred to by AMD as core complex dies or CCDs), now more compact due to the move of I/O components onto another die, can be manufactured using a smaller process with fewer manufacturing defects than a larger die would exhibit (since the chances of a die having a defect increases with device (die) size) while also allowing for more dies per wafer. In addition, the central I/O die can service multiple chiplets, making it easier to construct processors with a large number of cores.[14][21][22]

Simplified illustration of the Zen 2 microarchitecture
On the left (top on mobile): Die shot of a Zen 2 Core Complex Die. On the middle: Die shot of a Zen 2 EPYC/Threadripper I/O die, On the right (bottom): I/O die of a Zen 2 mainstream Ryzen I/O die.

With Zen 2, each CPU chiplet houses 8 CPU cores, arranged in 2 core complexes (CCXs), each of 4 CPU cores. These chiplets are manufactured using TSMC's 7 nanometer MOSFET node and are about 74 to 80 mm2 in size.[21] The chiplet has about 3.8 billion transistors, while the 12 nm I/O die (IOD) is ~125 mm2 and has 2.09 billion transistors.[23] The amount of L3 cache has been doubled to 32 MB, with each CCX in the chiplet now having access to 16 MB of L3 compared to the 8 MB of Zen and Zen+.[24] AVX2 performance is greatly improved by an increase in execution unit width from 128-bit to 256-bit.[25] There are multiple variants of the I/O die: one manufactured on GlobalFoundries 14 nanometer process, and another manufactured using the same company's 12 nanometer process. The 14 nanometer dies have more features and are used for the EPYC Rome processors, whereas the 12 nm versions are used for consumer processors.[21] Both processes have similar feature sizes, so their transistor density is also similar.[26]

AMD's Zen 2 architecture can deliver higher performance at a lower power consumption than Intel's Cascade Lake architecture, with an example being the AMD Ryzen Threadripper 3970X running with a TDP of 140 W in ECO mode delivering higher performance than the Intel Core i9-10980XE running with a TDP of 165 W.[27]

New features

  • Some new instruction set extensions: WBNOINVD, CLWB, RDPID, RDPRU, MCOMMIT. Each instruction uses its own CPUID bit.[28][29]
  • Hardware mitigations against the Spectre V4 speculative store bypass vulnerability.[30]
  • Zero-latency memory mirroring optimization (undocumented).[31]
  • Doubled width of the execution units and load store units (from 128-bit to 256-bit) in the floating point coprocessor and significant further throughput enhancements in the multiplication execution unit. This allows the FPU to perform single-cycle AVX2 calculations.[32]

Feature tables

CPUs

APUs

APU features table

Products

On 26 May 2019, AMD announced six Zen 2-based desktop Ryzen processors (codenamed "Matisse"). These included 6-core and 8-core variants in the Ryzen 5 and Ryzen 7 product lines, as well as a new Ryzen 9 line that includes the company's first 12-core and 16-core mainstream desktop processors. [33]

The Matisse I/O die is also used as the X570 chipset.

AMD's second generation of Epyc processors, codenamed "Rome", feature up to 64 cores, and were launched on 7 August 2019.[9]

Desktop CPUs

3000 series (Matisse)

Common features of Ryzen 3000 desktop CPUs:

  • Socket: AM4.
  • All the CPUs support DDR4-3200 in dual-channel mode.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 512 KB per core.
  • All the CPUs support 24 PCIe 4.0 lanes. 4 of the lanes are reserved as link to the chipset.
  • No integrated graphics.
  • Fabrication process: TSMC 7FF.
Branding and ModelCores
(threads)
Thermal SolutionClock rate (GHz)L3 cache
(total)
TDPChipletsCore
config[i]
Release
date
MSRP
BaseBoost
Ryzen 93950X16 (32)N/A3.54.764 MB105 W[ii]2 × CCD
1 × I/OD
4 × 4Nov 25, 2019US $749
3900XT12 (24)3.84 × 3Jul 7, 2020US $499
3900XWraith Prism4.6Jul 7, 2019
3900[a]OEM3.14.365 WOct 8, 2019OEM
Ryzen 73800XT8 (16)N/A3.94.732 MB105 W1 × CCD
1 × I/OD
2 × 4Jul 7, 2020US $399
3800XWraith Prism4.5Jul 7, 2019
3700X[a]3.64.4065 W[iii]US $329
Ryzen 53600XT6 (12)N/A3.84.595 W2 × 3Jul 7, 2020US $249
3600XWraith Spire (non-LED)4.4Jul 7, 2019
3600[a]Wraith Stealth3.64.265 WUS $199
3500X[36]6 (6)4.1Oct 8, 2019China
¥1099
3500OEM16 MBNov 15, 2019OEM (West)
Japan
¥16000[37]
Ryzen 33300X4 (8)Wraith Stealth3.84.31 × 4Apr 21, 2020US $119
31003.63.92 × 2US $99

Common features of Ryzen 3000 HEDT/workstation CPUs:

  • Socket: sTRX4 (Threadripper), sWRX8 (Threadripper PRO).
  • Threadripper CPUs support DDR4-3200 in quad-channel mode while Threadripper PRO CPUs support DDR4-3200 in octa-channel mode.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 512 KB per core.
  • Threadripper CPUs support 64 PCIe 4.0 lanes while Threadripper PRO CPUs support 128 PCIe 4.0 lanes. 8 of the lanes are reserved as link to the chipset.
  • No integrated graphics.
  • Fabrication process: TSMC 7FF.
Branding and ModelCores
(threads)
Clock rate (GHz)L3 cache
(total)
TDPChipletsCore
config[i]
Release
date
MSRP
BaseBoost
Ryzen
Threadripper
PRO
3995WX64 (128)2.74.2256 MB280 W
[ii]
8 × CCD
1 × I/OD
16 × 4Jul 14, 2020
3975WX32 (64)3.5128 MB4 × CCD
1 × I/OD
8 × 4
3955WX16 (32)3.94.364 MB2 × CCD
1 × I/OD
4 × 4
3945WX12 (24)4.04 × 3
Ryzen
Threadripper
3990X64 (128)2.9256 MB8 × CCD
1 × I/OD
16 × 4Feb 7, 2020US $3990
3970X32 (64)3.74.5128 MB4 × CCD
1 × I/OD
8 × 4Nov 25, 2019US $1999
3960X24 (48)3.88 × 3US $1399

4000 series (Renoir)

Based on the Ryzen 4000G series APUs but with the integrated graphics disabled.Common features of Ryzen 4000 desktop CPUs:

  • Socket: AM4.
  • All the CPUs support DDR4-3200 in dual-channel mode.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 512 KB per core.
  • All the CPUs support 24 PCIe 3.0 lanes. 4 of the lanes are reserved as link to the chipset.
  • No integrated graphics.
  • Fabrication process: TSMC 7FF.
  • Bundled with AMD Wraith Stealth

The AMD 4700S and 4800S desktop processors are part of a "desktop kit" that comes bundled with a motherboard and GDDR6 RAM. The CPU is soldered, and provides 4 PCIe 2.0 lanes. These are reportedly cut-down variants of the APUs found on the PlayStation 5 and Xbox Series X and S repurposed from defective chip stock.[39][40][41]

Branding and modelCores
(threads)
Clock rate (GHz)L3 cache
(total)
TDPCore
config[i]
Release
date
MSRP
BaseBoost
AMD4800S[39][40]8 (16)4.08 MB2 × 42022bundled with desktop kit
4700S[41]3.675 W2021
Ryzen 545006 (12)4.165 W2 × 3Apr 4, 2022US $129
Ryzen 341004 (8)3.84.04 MB1 × 4US $99

Desktop APUs

Common features of Ryzen 4000 desktop APUs:

  • Socket: AM4.
  • All the CPUs support DDR4-3200 in dual-channel mode.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 512 KB per core.
  • All the CPUs support 24 PCIe 3.0 lanes. 4 of the lanes are reserved as link to the chipset.
  • Includes integrated GCN 5th generation GPU.
  • Fabrication process: TSMC 7FF.
Branding and modelCPUGPUTDPRelease
date
Release
price
Cores
(threads)
Clock rate (GHz)L3 cache
(total)
Core
Config[i]
ModelClock
(GHz)
Config[ii]Processing
power[iii]
(GFLOPS)
BaseBoost
Ryzen 74700G[a]8 (16)3.64.48 MB2 × 4Radeon
Graphics[b]
2.1512:32:16
8 CU
2150.465 WJul 21, 2020OEM
4700GE[a]3.14.32.0204835 W
Ryzen 54600G[a][42]6 (12)3.74.22 × 31.9448:28:14
7 CU
1702.465 WJul 21, 2020
(OEM) /
Apr 4, 2022
(retail)
OEM /
US $154
4600GE[a]3.335 WJul 21, 2020OEM
Ryzen 34300G[a]4 (8)3.84.04 MB1 × 41.7384:24:12
6 CU
1305.665 W
4300GE[a]3.535 W

Mobile APUs

Renoir (4000 series)

Common features of Ryzen 4000 notebook APUs:

Branding and ModelCPUGPUTDPRelease
date
Cores
(threads)
Clock rate (GHz)L3 cache
(total)
Core
config[i]
ModelClock
(GHz)
Config[ii]Processing
power
(GFLOPS)[iii]
BaseBoost
Ryzen 94900H8 (16)3.34.48 MB2 × 4Radeon
Graphics
[a]
1.75512:32:8
8 CU
179235–54 WMar 16, 2020
4900HS3.04.335 W
Ryzen 74800H[50]2.94.21.6448:28:8
7 CU
1433.635–54 W
4800HS35 W
4980U[b]2.04.41.95512:32:8
8 CU
1996.810–25 WApr 13, 2021
4800U1.84.21.751792Mar 16, 2020
4700U[c]8 (8)2.04.11.6448:28:8
7 CU
1433.6
Ryzen 54600H[51]6 (12)3.04.02 × 31.5384:24:8
6 CU
115235–54 W
4600HS[52]35 W
4680U[b]2.1448:28:8
7 CU
134410–25 WApr 13, 2021
4600U[c]384:24:8
6 CU
1152Mar 16, 2020
4500U6 (6)2.3
Ryzen 34300U[c]4 (4)2.73.74 MB1 × 41.4320:20:8
5 CU
896

Lucienne (5000 series)

Common features of Ryzen 5000 notebook APUs:

Branding and ModelCPUGPUTDPRelease
date
Cores
(threads)
Clock rate (GHz)L3 cache
(total)
Core
config[i]
ModelClock
(GHz)
Config[ii]Processing
power
(GFLOPS)[iii]
BaseBoost
Ryzen 75700U8 (16)1.84.38 MB2 × 4Radeon
Graphics
[a]
1.9512:32:8
8 CU
1945.610–25 WJan 12, 2021
Ryzen 55500U[56]6 (12)2.14.02 × 31.8448:28:8
7 CU
1612.8
Ryzen 35300U4 (8)2.63.84 MB1 × 41.5384:24:8
6 CU
1152

Ultra-mobile APUs

In 2022, AMD announced the Mendocino ultra-mobile APUs.[57]

Common features of Ryzen 7020 notebook APUs:

  • Socket: FT6
  • All the CPUs support LPDDR5-5500 in dual-channel mode.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 512 KB per core.
  • All the CPUs support 4 PCIe 3.0 lanes.
  • Includes integrated RDNA 2 GPU.
  • Fabrication process: TSMC 6 nm FinFET.
Branding and ModelCPUGPUTDPRelease
date
Cores
(threads)
Clock rate (GHz)L3 cache
(total)
Core
config[i]
ModelClock
(GHz)
Processing
power[ii]
(GFLOPS)
BaseBoost
Ryzen 57520U[iii]4 (8)2.84.34 MB1 × 4610M
2 CU
1.9486.415 WSeptember 20, 2022[58]
Ryzen 37320U[iii]2.44.1


Embedded APUs

ModelRelease
date
FabCPUGPUSocketPCIe
support
Memory
support
TDP
Cores
(threads)
Clock rate (GHz)CacheArchi-
tecture
Config[i]Clock
(GHz)
Processing
power[ii]
(GFLOPS)
BaseBoostL1L2L3
V2516[61]November 10, 2020[62]TSMC
7FF
6 (12)2.13.9532 KB inst.
32 KB data
per core
512 KB
per core
8 MBGCN 5384:24:8
6 CU
1.51152FP620
(8+4+4+4)
PCIe 3.0
DDR4-3200
dual-channel

LPDDR4X-4266
quad-channel
10–25 W
V2546[61]3.03.9535–54 W
V2718[61]8 (16)1.74.15448:28:8
7 CU
1.61433.610–25 W
V2748[61]2.94.2535–54 W

Server CPUs

Common features of these CPUs:

  • Codenamed "Rome"
  • Zen 2 microarchitecture
  • TSMC 7 nm process
  • SP3 Socket
  • 128 PCIe lanes
  • Memory support: eight-channel DDR4-3200
ModelRelease
date
Price
(USD)
FabChipletsCores
(threads)
Core
config[i]
Clock rate (GHz)CacheSocket
&
Scaling
TDP
BaseBoostL1L2L3
7232PAugust 7,
2019
$450TSMC
7FF
2 × CCD
1 × I/OD
8 (16)4 × 23.13.232 KB inst.
32 KB data
(per core)
512 KB
(per core)
32 MB
(8 MB per CCX)
SP3
1P
120 W
7302P$8254 × CCD
1 × I/OD
16 (32)8 × 233.3128 MB
(16 MB per CCX)
155 W
7402P$125024 (48)8 × 32.83.35180 W
7502P$230032 (64)8 × 42.53.35
7702P$44258 × CCD
1 × I/OD
64 (128)16 × 423.35256 MB
(16 MB per CCX)
200 W
7252$4752 × CCD
1 × I/OD
8 (16)4 × 23.13.264 MB
(16 MB per CCX)
SP3
(up to) 2P
120 W
 7262$5754 × CCD
1 × I/OD
8 × 13.23.4128 MB
(16 MB per CCX)
155 W
7272$6252 × CCD
1 × I/OD
12 (24)4 × 32.93.264 MB
(16 MB per CCX)
120 W
7282$65016 (32)4 × 42.83.2
7302$9784 × CCD
1 × I/OD
8 × 233.3128 MB
(16 MB per CCX)
155 W
7352$135024 (48)8 × 32.33.2
7402$17838 × 32.83.35180 W
7452$202532 (64)8 × 42.353.35155 W
7502$26008 × 42.53.35180 W
7532$33508 × CCD
1 × I/OD
16 × 22.43.3256 MB
(16 MB per CCX)
200 W
7542$34004 × CCD
1 × I/OD
8 × 42.93.4128 MB
(16 MB per CCX)
225 W
7552$40256 × CCD
1 × I/OD
48 (96)12 × 42.23.3192 MB
(16 MB per CCX)
200 W
7642$47758 × CCD
1 × I/OD
16 × 32.33.3256 MB
(16 MB per CCX)
225 W
7662$615064 (128)16 × 423.3225 W
7702$645023.35200 W
7742$69502.253.4225 W
7H12September 18, 20192.63.3280 W
7F32April 14, 2020[63]$21004 × CCD
1 × I/OD
8 (16)8 × 13.73.9128 MB
(16 MB per CCX)
180 W
7F52$31008 × CCD
1 × I/OD
16 (32)16 × 13.53.9256 MB
(16 MB per CCX)
240 W
7F72$24506 × CCD
1 × I/OD
24 (48)12 × 23.23.7192 MB
(16 MB per CCX)
240 W

Video game consoles and other embedded

Gallery

See also

References